This invention relates to a method of manufacturing a semiconductor integrated circuit device and more particularly, to a technique applicable to the manufacture of a semiconductor integrated circuit device having MISFET's (metal insulator semiconductor field effect transistors).
For the formation of a MISFET (metal insulator semiconductor field effect transistor) on a single crystal silicon semiconductor substrate, the usual practice is to utilize a device isolation technique using a LOCOS (local oxidation of silicon) method as a method of forming a device isolation insulating layer or film.
In the procedure for making a MISFET using the above-mentioned method, a thin silicon oxide film called a pad oxide film, is initially formed on one surface of a semiconductor substrate, on which a silicon nitride film is subsequently deposited and selectively etched to remove the silicon nitride from a device isolation region. Thereafter, the semiconductor substrate is thermally treated at approximately 1000.degree. C. to cause a thick silicon oxide film (i.e. a field oxide film) to grow on the semiconductor surface at the device isolation region.
Next, after removal of the silicon oxide film left at a device formation region and the pad oxide film formed therebeneath by etching, the substrate surface at the device formation region is oxidized to form a gate oxide film, followed by ion implantation of an impurity for threshold voltage (V.sub.th) control into the substrate surface of the device formation region. Thereafter, a gate electrode material, such as a polysilicon film deposited on the substrate, is subjected to patterning to form a gate electrode, followed by ion implantation of an impurity into the substrate at opposite sides of the gate electrode to form source and drain regions.